The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 30, 1988

Filed:

Jun. 20, 1985
Applicant:
Inventor:

Kazuhiro Tada, Tokyo, JP;

Assignee:

NEC Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C / ; G11C / ;
U.S. Cl.
CPC ...
365222 ; 365189 ;
Abstract

A semiconductor memory circuit which can operate with reduced value of peak currents. The memory circuit includes two or more memory cell arrays each having a plurality of memory cells and a peripheral circuit for achieving selective access operation is provided for each array. At least a timing signal and its delayed timing signals are generated in response to a control signal. Both of the timing signal and the delayed timing signal are used to enable the peripheral circuits at different timing.


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