The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 30, 1988
Filed:
Sep. 30, 1986
Joseph W Yoder, Fairfax, VA (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A CMOS flip-flop circuit is disclosed which enables a single side pull-down operation for inputting test signals during a test mode and alternately a dual side push-pull operation for inputting data signals during the normal use of the circuit. A pair of inverter circuits selectively feed complementary data signals to opposite sides of a bistable circuit so that the circuit operates in the push-pull manner thereby decreasing the switching time of the flip-flop. A pair of transmission gates, which are coupled to outputs of the inverter circuits, electrically isolate any noise appearing at a data input from the bistable circuit. During a test mode of the flip-flop, a test signal is fed into one side of the bistable circuit and facilitates a single side pull-down operation of the flip-flop. Two such flip-flop circuits are concatenated in a push-pull cascaded connection to provide a shift register latch.