The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 16, 1988

Filed:

Oct. 08, 1986
Applicant:
Inventors:

John A Geen, Bracknell, GB;

Brian Johnson, Bracknell, GB;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M / ;
U.S. Cl.
CPC ...
3403 / ; 3403 / ; 3403 / ; 375 26 ;
Abstract

Analog-to-digital converters are subject to errors including the known half least significant bit quantization error and also bit weighting errors due to lack of an ideal binary relationship between the transition points of all the bits. The known statistical average error reduction method in which a relatively small dither component is added to the analog input signal can only fractionally reduce overall error and has little effect on bit weighting errors. Herein the analog signal is added to a dither signal, for example a ramp signal, which varies through half the peak to peak digitization range of the converter so that irrespective of the input signal all output signal bits, other than the most significant bit, are 'on' for one half of the sampling period. The result is that all the less significant bit errors are cancelled leaving only the easily compensated most significant bit error. A random component can be added to the dither signal to reduce the quantization error.


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