Interrupt controller arrangement for mutually exclusive interrupt

Abstract

An interrupt controller circuit arrangement is used for encoding and storing 'interrupt' signals indicating random (asynchronous) occurrence of corresponding events and for delivering corresponding 'interrupt' (alarm command) signals to a (synchronous) microprocessor corresponding to the events as they occur. The events are divided into two (or more) sets in order to reduce the required number of latches and to increase the speed of operation. One (or more) of these sets consists of events which never can occur 'simultaneously' (i.e., which are mutually exclusive in the sense that (within each of such sets) not more than a single one of the events can occur--and can occur only once--within a prescribed amount of time); the remaining set consists of the remaining events--i.e., those which can occur 'simultaneously' or can occur simultaneously with one or more of those in the other set(s). In this way only the interrupt signals indicating the occurrence of events in the remaining set need be individually latched in separate latches each of which is devoted to a separate one of the events in that set.