The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 19, 1988
Filed:
Apr. 02, 1987
Edward T Lewis, Sudbury, MA (US);
Raytheon Company, Lexington, MA (US);
Abstract
A 1.2 .mu.m CMOS binary counter having a 200 MHz clock rate comprises a 4-bit counting section that may be concatenated in multiple 4-bit sections. Each bit stage within a 4-bit counter section uses the current state of such stage to determine what happens in the next stage. Each 4-bit section performs the counting function through a successive process of additions of a lowest order carry-bit input. A count enable signal serves to enable the count process as well as serving as a carry-bit input to a first stage. Count enable effects a counter reset when in a logic 'zero' state. Once the count enable is raised to the logic 'one' state, the process of counting begins with the rising edge of the first clock pulse. As long as the count enable is maintained, counting continues. When the count enable is reduced to a 'zero' state, counting is terminated, with a counter reset occurring on the next sequential rising edge of the clock.