Timing signal generating apparatus

Abstract

A timing signal generating apparatus comprises a first shift register having an input supplied with a first select signal and shifting the first select signal with a first reference clock signal, a second shift register having an input supplied with timing data for shifting the timing data with the first reference clock signal, a first selector having an input supplied with the output of the first shift register and extracting the output from the first shift register at a position corresponding to the stage designated by a second select signal, a second selector having an input supplied with the output of the second shift register for producing the output from the second shift register at a position corresponding to the stage designated by the second select signal, a gate circuit having inputs supplied with a second reference clock signal delayed in phase relative to the first reference clock and the output of the first selector, respectively, a counter for counting a clock signal of a repetition period shorter than that of the first reference clock signal, the counter being reset in response to the output of the gate circuit, a setting circuit having an address input supplied with the output of the second selector, an inhibit signal generating circuit having an input supplied with the second select signal, and a coincidence detection circuit having inputs supplied with the output of the counter, the output of the inhibit signal generating circuit and the output of the setting circuit, respectively. The coincidence detection circuit responds to the output of the inhibit signal generating circuit to be inhibited from producing the output for the period during which the second select signal is changed over. The timing signal derived from the coincidence detection circuit is delayed for a time equal to a sum resulting from the addition of the period of the reference clock signal multiplied with the stage number of the shift registers and a value set at the setting circuit.