The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 12, 1988

Filed:

Jun. 20, 1986
Applicant:
Inventors:

Kazuyasu Fujishima, Itami, JP;

Masaki Kumanoya, Itami, JP;

Hideshi Miyatake, Itami, JP;

Hideto Hidaka, Itami, JP;

Katsumi Dosaka, Itami, JP;

Tsutomu Yoshihara, Itami, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C / ;
U.S. Cl.
CPC ...
365210 ; 365203 ;
Abstract

A dummy word line driving circuit for a MOS dynamic RAM comprises a dummy word line controller connected to each end of a pair of dummy word lines. A sub-decode signal which is opposite to the one inputted to a dummy word driver and a dummy set signal for writing a bit line information into a not-selected dummy cell are inputted to the dummy word line controller. Means for applying a dummy equalizing signal is connected to two full-sized dummy cells, for equalizing the two before the dummy word line is driven. The two full-sized dummy cells are equalized by the signal, resulting in a charge amount, which is to be a reference value, of a half of a full-sized memory cell.


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Fujishima, Kazuyasu. (1988). Dummy word line driving circuit for a mos dynamic ram (U.S. Patent No. 4757476). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/4757476

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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