The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 05, 1988

Filed:

Feb. 07, 1985
Applicant:
Inventors:

Hirokazu Suzuki, Yamato, JP;

Takehiro Akiyama, Kawasaki, JP;

Teruo Morita, Kawasaki, JP;

Assignee:

Fujitsu Limited, Kawasaki, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K / ; H03K / ;
U.S. Cl.
CPC ...
3072 / ; 3072 / ; 307443 ; 307278 ; 307308 ; 307455 ;
Abstract

A latch circuit inputting and holding a write data including a data input terminal for receiving a write data signal and a feedback input terminal for receiving a feedback signal from an output terminal, the latch circuit through a feedback loop, wherein the output terminal of the latch circuit outputs the write data signal at a suitable timing. The latch circuit is operated such that a potential difference between a peak voltage of a logic amplitude and a reference voltage at the side at which the feedback signal is applied is set larger than a potential difference between the peak voltage of the logic amplitude and the reference voltage at the side at which the write data signal is applied.


Find Patent Forward Citations

Quick Actions:

Suzuki, Hirokazu. (1988). Ecl latch circuit insensitive to alpha ray disturbances (U.S. Patent No. 4755693). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/4755693

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Loading…