The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 28, 1988

Filed:

Apr. 24, 1987
Applicant:
Inventor:

Bernard L Morris, Allentown, PA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K / ; H03F / ;
U.S. Cl.
CPC ...
307355 ; 330253 ;
Abstract

In various analog applications, it is desirable to have a known offset voltage at the input of a comparator, operational amplifier, or other type of differential stage. For example, in an ISDN receiver, the use of a desired offset allows for discriminating between signals having different amplitudes. In the present technique, a reference current, derived from a reference voltage (V.sub.ref) and on-chip resistor (R1) is used to set the currents through two input transistors, typically MOS transistors. An offset resistor (R0) in the source lead of one of the transistors produces a voltage drop that sets the offset at an input of the differential stage. The voltage drop across R0 is proportional to (V.sub.ref .times.R0)/R1. Since R0 and R1 are fabricated by the same process, their ratio is independent of temperature, process, etc. Therefore, a well-defined offset is obtained.


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