The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 28, 1988
Filed:
Feb. 24, 1986
Applicant:
Inventors:
Michael T Welch, Sugar Land, TX (US);
Willard E Lones, San Antonio, TX (US);
Assignee:
Texas Instruments Incorporated, Dallas, TX (US);
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G03C / ;
U.S. Cl.
CPC ...
430313 ; 430314 ; 430317 ; 430330 ;
Abstract
A method of processing an interlevel dielectric layer in a VLSI device having a plurality of leads which includes depositing a layer of photoresist over the dielectric layer. The photoresist is then patterned to open areas where interlevel contacts are to be formed and then heated to a sufficiently high temperature and for a sufficient time to remove solvents and obtain a desired slope surrounding the open areas. The photoresist and dielectric is etched to planarize the dielectric surface, to expose the underlying leads and to remove all of the photoresist.