The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 14, 1988

Filed:

Aug. 07, 1985
Applicant:
Inventors:

Chu-Ping Wang, Carrollton, TX (US);

Ashwin H Shah, Dallas, TX (US);

Richard H Womack, Dallas, TX (US);

Assignee:
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C / ;
U.S. Cl.
CPC ...
365233 ; 365241 ; 365230 ;
Abstract

A semiconductor memory includes a memory array (10) that is operable to be addressed in either the page mode or the static column decode mode. A column address transparent latch (20) is provided which is controlled to either directly input a column address to a column decoder (26) or to latch the address in response to the generation of the column address strobe. A sequence detect circuit (30) detects the sequence to the row address strobe and the column address strobe to determine whether the page mode or the static column decode mode is generated. The sequence detect circuit (30) generates a Y-enable signal in a circuit (31) for control of the latch (20).


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