The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 31, 1988

Filed:

Jan. 20, 1987
Applicant:
Inventors:

Tetsuya Ikeda, Yokohama, JP;

Yukitoshi Tsuboi, Yokohama, JP;

Shigeru Hirahata, Yokohama, JP;

Assignee:

Hitachi, Ltd., Tokyo, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H04N / ; H04N / ;
U.S. Cl.
CPC ...
358142 ; 358 22 ; 358160 ; 358183 ; 340721 ; 340749 ;
Abstract

The video memory control apparatus of the present invention has the first and second counters for repetitiously counting the clock signal at an interval of the display cycle period. The second counter is reset by an external synchronization signal. The first counter is reset by the counter reset signal supplied from the counter reset signal generator circuit. The counter reset signal is used to continue resetting the first counter from when the first counter terminates counting the display cycle period to when the second counter terminates counting the display cycle period. When an external synchronization with a phase shift is inputted, the first counter is kept reset by the counter reset signal for a period corresponding to the phase shift of the external synchronization signal. Consequently, in a case of the superimpose display, even if the external synchronization signal undergoes a phase shift, the synchronization can be established again in a short period of time.


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