The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 31, 1988

Filed:

Oct. 02, 1987
Applicant:
Inventor:

Shinji Emori, Urawa, JP;

Assignee:

Fujitsu Limited, Kawasaki, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K / ; H03K / ;
U.S. Cl.
CPC ...
307566 ; 307455 ; 307318 ; 307362 ;
Abstract

An emitter-coupled logic (ECL) circuit having a pull-down resistor and including a breakdown protecting structure. Such breakdown occurs in an input transistor for receiving input data when an excess reverse voltage is applied across the emitter and base of the input transistor. The breakdown protection structure preferably includes a constant-voltage regulating device which can always clamp the level of a reference voltage V.sub.BB to a suitable level higher than a low voltage V.sub.EE of a power source by the value of a constant voltage. The reference voltage V.sub.BB is usually applied to the base of another transistor which should be coupled, at respective emitters, with the input transistor by the representative emitters.


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