The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 10, 1988
Filed:
Aug. 03, 1987
Applicant:
Inventor:
Joe M Smith, Scottsdale, AZ (US);
Assignee:
Motorola, Inc., Schaumburg, IL (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03C / ; H03C / ; H03L / ;
U.S. Cl.
CPC ...
332 / ; 332 18 ; 332 19 ; 331 16 ; 331 17 ; 331 25 ; 331179 ; 455260 ;
Abstract
Phase port gain compensating circuitry is coupled to the phase modulation summing circuit and voltage controlled oscillator (VCO) gain compensating circuitry is coupled to the frequency control terminal of the VCO. Compensator control circuitry utilizes divider ratio control information to control the characteristics of the two compensators to compensate for otherwise undesirable effects on the phase-locked loop response parameters caused by changes in the divider ratio and in the VCO gain.
Smith, Joe. (1988). Compensation circuitry for dual port phase-locked loops (U.S. Patent No. 4743867). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/4743867
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile