The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 03, 1988
Filed:
Dec. 30, 1985
Applicant:
Inventor:
Joseph M Fitzgerald, Rochester, MN (US);
Assignee:
International Business Machines Corporation, Armonk, NY (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ; H01L / ; H01L / ; H01L / ;
U.S. Cl.
CPC ...
357 45 ; 357 41 ; 357 68 ; 307465 ;
Abstract
A cell layout provides a practical masterslice design for random logic in any LSI FET technology. Each cell is capable of the order of about 20 different functions at any of several different power levels. Multiple cells can be combined to form standard macro functions.
Fitzgerald, Joseph. (1988). Multi-function fet masterslice cell (U.S. Patent No. 4742383). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/4742383
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile