The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 19, 1988

Filed:

Aug. 27, 1986
Applicant:
Inventors:

Gerhard Packeiser, Kirchheim, DE;

Helmut Schink, Munich, DE;

Gerard M Martin, Paris, FR;

Jose Maluenda, Boissy Saint Leger, FR;

Assignees:

Siemens Aktiengesellschaft, Berlin and Munich, DE;

U.S. Philips Corp., New York, NY (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ; H01L / ; H01L / ;
U.S. Cl.
CPC ...
357 68 ; 357 231 ; 357 45 ; 3241 / ; 3241 / ;
Abstract

An integrated circuit structure to be built on a semiconductor substrate wafer for the purpose of undertaking a quality check of the wafer has a plurality of field effect transistors laterally disposed in the same close adjacency as transistors which are to be manufactured on a chip using the wafer material. Each field effect transistor has its own well structure, its own source structure, and its own drain structure. The individual field effect transistors have pads allocated thereto at an edge of the structure. Each transistor source/drain structure is connected to the pads by a conductor, the totality of these conductors having width and/or length dimensions so that each run has approximately the same resistance. Only one common gate conductor for all of the transistors is provided.


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