Counter-based simulated target generator

Abstract

Apparatus and a method for generating simulated target signals for testing a radar system is disclosed. The fundamental timing intervals for each pulse of the simulated target signal are generated based upon the contents of a high-speed continuously running digital counter. The resolution of the system is determined by the clock rate utilized to increment the counter. Simulated target signals are generated by utilizing an adder to add the desired range to the contents of the counter at a time interval corresponding to each pulse of the radar sync signal. The output signal of the adder corresponds to the expected output of the counter at a time corresponding to the return pulse associated with the transmit sync signal. These values are stored in a digital memory at sequential address locations. The stored values are sequentially read to produce at the output of the memory a digital signal corresponding to the value of the high-speed counter at the time that the return pulse is to be generated. The output data of the memory is compared to the contents of the counter and when they are found to be equal, a pulse of the simulated target signal is generated and the read address to the memory is incremented one count. This process is repeated for each pulse of the transmit sync signal to generate at the output a pulse train with each pulse of the output being delayed from its corresponding pulse of the transmit sync signal by the value determined by the range signal.