The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 05, 1988
Filed:
Oct. 21, 1986
Hideaki Matsue, Kanagawa, JP;
Takehiro Murase, Kanagawa, JP;
Nippon Telegraph and Telephone Corporation, Tokyo, JP;
Abstract
An interference cancellation system at a receiver side for digital radio system has a first quadrature phase detector for demodulating the main signal. A second quadrature phase detector (or a phase detector) is supplied with the same reference carrier and clock signal as that of the first quadrature phase detector, for phase detecting an interference signal. A decision circuit is coupled with the first quadrature phase detector to provide a baseband signal. An error signal detector provides a difference between a decision level of a digital signal and an input of the decision circuit due to the interference signal. A correlation device provides a correlation signal between an error signal and a phase detected interference signal. A control device provides a compensation signal which has the same amplitude and anti-phase as those of the interference component included in the main signal according to the correlation signal. A combiner combines the main signal with the compensation signal to provide a compensated main signal which is free from interference. A combiner and a control means may be inserted either in an RF stage or an IF stage, or in a baseband stage. An error signal detector and decision circuit are implemented by an A/D converter. A correlation means is implemented by a digital or analog multiplier and integrators.