The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 05, 1988
Filed:
Apr. 29, 1986
Applicant:
Inventor:
Takanori Sugihara, Inagi, JP;
Assignee:
Fujitsu Limited, Kanagawa, JP;
Primary Examiner:
Int. Cl.
CPC ...
H03K / ; H03K / ; H03K / ;
U.S. Cl.
CPC ...
377 29 ; 377 73 ; 307465 ; 307291 ; 3072471 ; 365201 ; 365205 ;
Abstract
A logic circuit having a test data loading function, comprising at least one J-K flip-flop. Each J-K flip-flop includes a test data latching logic circuit. In response to an enable signal, test data is selected in place of the usual J and K input data to be latched. In a complex logic circuit including such flip-flops, a test can be effected in a short time.
Sugihara, Takanori. (1988). Logic circuit having a test data loading function (U.S. Patent No. 4736395). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/4736395
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