The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 05, 1988

Filed:

Nov. 17, 1986
Applicant:
Inventor:

Hans-Christian Schaber, Graefelfing, DE;

Assignee:

Siemens Aktiengesellschaft, Berlin and Munich, DE;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
437 33 ; 437 41 ; 437 57 ;
Abstract

A process for the simultaneous production of bipolar transistors and complementary MOS transistors on a common silicon substrate wherein to accommodate the p-channel transistors, n-doped zones are produced in a p-doped substrate and npn bipolar transistors are provided in the n-doped zones where the n-zones form the collector of the transistor and the n-zones are superimposed over n.sup.+ -doped zones. The latter are connected in the bipolar transistor zone by deeply extending collector terminals. The use of sidewall insulation on the p.sup.+ - and n.sup.+ -conducting structures composed of polysilicon or a silicide which are used for diffusing-out source/drain zones and base-emitter zones permit the formation of shorter channel lengths. The process is used to produce VLSI circuits which have high switching speeds.


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