The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 15, 1988
Filed:
May. 28, 1986
Applicant:
Inventors:
Hans-Jurgen Neumann, St. Wendel, DE;
Artur Meisberger, St. Wendel, DE;
Assignee:
Fresenius AG, Bad Homburg, DE;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01J / ; H01J / ;
U.S. Cl.
CPC ...
2502 / ; 250551 ;
Abstract
Failsafe logic circuits, for instance AND-, NOR-, NAND- and OR-circuits are devised at which at least one signal input is connected to a signal output via an optocoupler. Herewith dimensioning problems with respect to transistors and coupling capacitors as known from conventional failsafe logic circuits do not appear. Further on an optocoupler cannot fail in such a manner that between a photodiode and a phototransistor a galvanic coupling may arise.
Neumann, Hans-Jurgen. (1988). Failsafe logic circuit wherein the phototransistor of a preceding (U.S. Patent No. 4731528). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/4731528
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile