The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 01, 1988

Filed:

Dec. 17, 1986
Applicant:
Inventors:

David P Chengson, Mountain View, CA (US);

Aurangzeb K Khan, San Bruno, CA (US);

Assignee:

Tandem Computers Incorporated, Cupertino, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K / ; H03K / ; H03K / ;
U.S. Cl.
CPC ...
3072722 ; 307289 ; 307290 ; 307291 ; 307455 ; 307466 ; 307467 ;
Abstract

An improved EFL gate which provides concurrent true and complementary outputs. An input transistor has its base coupled to an input and its emitter coupled to an emitter of a reference transistor. The reference transistor has its base coupled to a voltage reference and its collector coupled to the base of a true output transistor. The emitter of the true output transistor provides the true output, while its collector is coupled to a voltage supply. A complementary output transistor has its base coupled to the collector of the input transistor with its emitter providing the complementary output. Its collector is coupled to the voltage supply, as is the collector of the input transistor.


Find Patent Forward Citations

Chengson, David. (1988). Emitter function logic with concurrent, complementary outputs (U.S. Patent No. 4728818). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/4728818

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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