The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 23, 1988
Filed:
Jun. 23, 1987
Mark A Harris, Clearwater, FL (US);
William E Coleman, Jr, Clearwater, FL (US);
Joseph M DeLeon, St. Petersburg, FL (US);
Eugene M Littlefield, Redington Beach, FL (US);
Earnest A Franke, Largo, FL (US);
E-Systems, Inc., Dallas, TX (US);
Abstract
A high power RF resistor for use, for example, as an isolation resistor in an RF hybrid splitter/combiner is formed on a thermally conductive substrate. A first insulating beryllia (BeO) layer extends over the substrate and has a top surface and a bottom surface. A first metallization layer extends over the top surface of the first insulating layer and includes a longitudinally-extending gap. A second insulating BeO layer is positioned above the first insulating layer and includes a top surface, a bottom surface and first and second side surfaces. A second metallization layer surrounds the bottom surface and the first and second side surfaces of the second insulating layer and has a longitudinally-extending gap, the gap in the second metallization layer positioned to be in alignment with the gap in the first metallization layer. This structure forms a Faraday shield between the resistive layer and ground to thereby reduce the I.sup.2 R loss resulting from stray capacitance normally associated with isolation resistors. A thin film resistive layer extends over the second insulating layer to form the active resistor element. Preferably, inductors are connected between the terminals of the resistor and ground to tune out parasitic capacitance generated by the metallization layers.