The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 23, 1988

Filed:

Feb. 24, 1987
Applicant:
Inventors:

Shigeru Fujii, Yokohama, JP;

Kouichi Yamashita, Machida, JP;

Tomoaki Tanabe, Yokohama, JP;

Yoshio Kuniyasu, Kawasaki, JP;

Assignee:

Fujitsu Limited, Kawasaki, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K / ; H03K / ;
U.S. Cl.
CPC ...
307443 ; 307448 ; 307451 ; 307475 ; 307577 ; 307579 ; 307591 ; 307303 ;
Abstract

As the number of output circuit increases in LSI or VLSI circuit, there increases the chance of many large output circuits operates at a same instant, and it causes malfunction of logic by induced switching noise. In order to prevent such problem, the switching speed of driving buffer circuit for output buffer circuit is controlled. By reducing the switching capacity of the driving circuit, the switching speed of the total circuit is not affected so much, but the noise is decreased very much. The control of the switching capacity of the driving buffer circuit is performed by master slice technology. Such as perfectly opposite design concept to that of present LSI design has been proofed by experiments.


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