The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 16, 1988

Filed:

Aug. 29, 1986
Applicant:
Inventors:

Dale P Stein, Sherman, TX (US);

Sam M Weaver, Sherman, TX (US);

James C Spurlin, Sherman, TX (US);

Steven E Marum, Sherman, TX (US);

Assignee:
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K / ; H03K / ; H01L / ; H01L / ;
U.S. Cl.
CPC ...
307579 ; 307303 ; 307263 ; 307443 ; 307451 ; 307594 ; 307601 ; 307481 ; 307605 ; 357 231 ; 357 238 ; 357 2314 ; 357 42 ; 357 51 ; 357 59 ;
Abstract

A complimentary output pair (10) having a P-channel transistor (12) and an N-channel transistor (14) prevents output voltage spikes due to rapid changes in current with respect to time at the V.sub.cc power supply and ground (32) nodes by using a 'graded turn-on.' Both the P-channel transistor (12) and the N-channel (14) utilize a serpentine polysilicon gate (16), (24), in order to sequentially turn on the sub-transistors in response to a changing input. Pull-up (36) and pull-down (40) transistors are used to turn the sub-transistors (21a-j, 29a-f) off simultaneously.


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