The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 16, 1988

Filed:

Sep. 23, 1982
Applicant:
Inventors:

Makoto Segawa, Tokyo, JP;

Shoji Ariizumi, Tokyo, JP;

Assignee:

Kabushiki Kaisha Toshiba, Kawasaki, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K / ; H03K / ; H03K / ; H03K / ;
U.S. Cl.
CPC ...
307482 ; 307578 ; 307450 ;
Abstract

A semiconductor circuit has first and second MOS transistors which are connected between an output terminal and a positive and a reference power source terminal, respectively, a bootstrap capacitor connected between the output terminal and the gate of the first MOS transistor, an inverter which inverts the input signal and which supplies the inverted signal to the gate of the second MOS transistor after a predetermined delay timne, and a switching MOS transistor having a current path connected between the input terminal and the gate of the first MOS transistor. The switching MOS transistor has a threshold voltage greater than that of the second MOS transistor.


Find Patent Forward Citations

Segawa, Makoto. (1988). Mosfet buffer circuit with an improved bootstrapping circuit (U.S. Patent No. 4725746). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/4725746

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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