The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 12, 1988

Filed:

Dec. 24, 1984
Applicant:
Inventor:

Toshiaki Misono, Gyoda, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K / ; H03K / ;
U.S. Cl.
CPC ...
307269 ; 307480 ; 307262 ; 328 63 ; 328 72 ; 328133 ; 328155 ;
Abstract

A clocked logic circuit operates in synchronism with a clock and is supplied with an input binary signal asynchronously with the clock for issuing an output binary signal. A phase detector circuit produces a phase difference signal indicating into which of k divided phase regions of one period of the clock falls, the phase difference between the input binary signal and the clock. The phase difference signal is delayed by a matching delay means for a delay approximately equal to a delay of the clocked logic circuit. An output binary signal from the clocked logic circuit is given a delay corresponding to one of the k phase regions designated by the delayed phase difference signal, and the delayed output binary signal is issued to an output terminal.


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