The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 12, 1988
Filed:
Oct. 01, 1985
John D Pequet, Laguna Niguel, CA (US);
Michael B Pulizzi, Anaheim, CA (US);
Roger Cook, Garden Grove, CA (US);
Pulizzi Engineering, Inc., Santa Ana, CA (US);
Abstract
Multi-time delay power controller apparatus for providing time-delayed power or control signals to associated electrical equipment, such as computers and disc drives, comprises a power stage configured for connecting to a conventional power outlet, a D.C. power supply connected to an interval D.C. voltage bus, an output stage having a plurality of time delayed outputs and a plurality of time delay timing stages connected in electrical series to one another between the D.C. voltage bus and ground. Each such timing stage includes a timing means, and a normally open control relay. Coils of odd numbered timing stages are connected to ground and of even numbered stages to the D.C. voltage bus. The timing stages are connected so that the timing out of one stage starts the timing of the next-in-sequence stage, timing of the first-in-sequence timing stage being started when the apparatus is turned on. The control relays are actuated when a stage times out, thereby causing a time delayed control signal to be provided to the output stages. When time delayed power outputs are provided, the time delayed control signal energizes a normally open power relay which connects the associated power output to the power stage.