Memory means with multiple word read and single word write

Abstract

A memory system connected by means of a system bus to other components of a data processing system. The memory system includes a memory control unit and at least one memory unit in which information units containing two words are stored. The memory control unit is connected to the system bus and receives system addresses and memory commands from the system bus, and depending on the memory command, receives data from or provides data to the system bus. A memory bus and lines for control signals specifying memory requests connect the memory control unit and the memory unit. The memory bus is time multiplexed between memory addresses and information units. The memory control unit receives a memory command, a system address, and in the case of a write command, system data on the system bus and produces the memory requests, memory addresses, and information units required to carry out the memory command. The memory unit responds to a multiple double read request produced from a read octal word memory command specifying a read of 8 words by generating the sequence of addresses required to serially output the information units containing the 8 words on the memory bus. The memory control unit receives the sequence of information units and provides the 8 words contained therein in order to the system bus.