The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 15, 1987

Filed:

Nov. 13, 1986
Applicant:
Inventors:

Richard H Womack, Dallas, TX (US);

Sanjay K Banerjee, Richardson, TX (US);

Hisashi Shichijo, Garland, TX (US);

Satwinder Malhi, Garland, TX (US);

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L / ; H01L / ; H01L / ; H01L / ;
U.S. Cl.
CPC ...
357 236 ; 357 234 ; 357 41 ; 357 45 ; 357 51 ; 357 55 ; 357 59 ;
Abstract

A dRAM cell and array of cells, together with a method of fabrication, are disclosed wherein the cell includes one field effect transistor and one storage capacitor with the capacitor formed in a trench in a substrate and the transistor channel formed by epitaxial growth on the substrate. The transistor source and drain are insulated from the substrate, and the transistor may be adjacent the trench or on the upper portion of the trench sidewalls. Signal charge is stored on the capacitor plate insulated from the substrate.


Find Patent Forward Citations

Womack, Richard. (1987). Dram cell and method (U.S. Patent No. 4713678). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/4713678

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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