The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 15, 1987

Filed:

Sep. 22, 1986
Applicant:
Inventors:

Shinya Hasuo, Yokohama, JP;

Norio Fujimaki, Yokohama, JP;

Assignee:

Fujitsu Limited, Kawasaki, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K / ;
U.S. Cl.
CPC ...
307462 ; 307471 ; 307476 ; 307306 ; 357-5 ;
Abstract

A Josephson-junction logic circuit comprises at least one Josephson-junction logic gate which has a variable threshold-type superconductive quantum interference element. The Josephson-junction logic gate comprises a superconductive inductance loop, and at least two Josephson junctions included in the superconductive loop. At least two current-injection lines connected to the superconductive loop and at least one magnetically coupled line are provided. The magnetically coupled line is placed so as to be magnetically coupled to the inductance. Because of this construction, the number of inputs can be increased. Also, various logical functions can be obtained. Further, various logic circuits can be formed by simply changing the photomask for the wiring between the gates.


Find Patent Forward Citations

Hasuo, Shinya. (1987). Josephson-junction logic circuit (U.S. Patent No. 4713562). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/4713562

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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