The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 15, 1987
Filed:
Apr. 29, 1985
Tho T Vu, Fridley, MN (US);
Kang W Lee, Wayzata, MN (US);
Honeywell Inc., Minneapolis, MN (US);
Abstract
An OR logic function is provided in at least two separate circuit branches by diodes in parallel summing current at a first logic node and a first circuit branch and diodes in parallel summing current at a second logic node in a second current branch. An AND logic function is performed at a third logic node by using additional diodes connected in parallel at the third logic node so as to share current passing through the third logic node, with the logic conditions at the first and second logic nodes serving as the inputs to the AND logic function. The logic condition at the third logic node is applied to the gate of a switching FET. The switching FET is conveniently employed to invert the logic condition at the third logic node. The invention is particularly suited for use with MESFET logic families using gallium arsenide (GaAs) substrates.