Frequency multiplying circuit

Abstract

A frequency multiplying circuit comprises a differential amplifier formed by two transistors whose emitters are connected by a current source to a low voltage supply rail, collector resistors are connected to a higher voltage rail as is also done with the base electrode of one of the transistors, the base electrode of the other of the transistors has an oscillator connected thereto. An LC resonant circuit coupled between the collectors of the two transistors and is tuned to select either the basic frequency of the oscillator or an odd harmonic thereof. In order to overcome problems of excessive damping of the resonant circuit due to the collector resistors of the differential amplifier being effectively in parallel therewith which damping is made worse when the load of the following stage is added, it was found that the frequency multiplying circuit could provide a high quality factor and low power consumption if the coupling between the differential amplifier and the resonant circuit is reduced and also if the effect of the load of the next following stage was overcome. This is achieved by connecting a negative resistance circuit across the resonant circuit. The negative resistance circuit comprises a transistorized differential amplifier, the base electrodes of the transistors are cross connected to the collector of the other transistor, to form a negative conductance which is in parallel with the positive conductances which are causing the resonant circuit to be lossy. Hence the parallel loss conductance is reduced in value and the effective Q is increased.