The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 08, 1987

Filed:

Nov. 21, 1985
Applicant:
Inventor:

Robert J Russell, Boston, MA (US);

Assignee:
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H05K / ;
U.S. Cl.
CPC ...
29832 ; 324 / ;
Abstract

A method for achieving printed circuit (PC) board-level testability through electronic component-level design using available technological methods to effect a state of transparency during test, allowing precise verification and diagnosis on a component-by-component basis. Applicable to a greater variety of electronic products than other test methods, and not appreciably constraining functional design, this approach inherently avoids obstacles which prevent other techniques from fulfilling their objectives. This method is applicable to analog or digital electronic components and circuits and results in the ability to largely combine component level and board level test development efforts, a reduction in the need for exhaustive component testing prior to board assembly, the applicability of a single tester configuration to a number of product types, the ability to substitute a verified component for a suspect one without removal, and the ability to detect marginally operative components which have not yet affected board functionality. This method allows the production and stocking of a single set of compatible electronic components to be used in place of existing electronic components as well as allowing existing electronic designs to be converted to this test method by substituting compatible electronic components for all existing electronic components.


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