The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 03, 1987
Filed:
Aug. 02, 1985
Applicant:
Inventors:
William W Piper, Scotia, NY (US);
George E Possin, Schenectady, NY (US);
Assignee:
General Electric Company, Schenectady, NY (US);
Primary Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
357 237 ; 357-2 ; 357-4 ; 357 45 ; 357 55 ;
Abstract
An amorphous silicon thin film FET is doped and structured to be particularly useful for use in liquid crystal display circuits. In particular, critical FET dimensions are provided along with doping levels and locations which permit optimal reduction of source to gate capacitance, while at the same time, preventing the occurrence of large contact voltage drops. Critical dimensions include active channel length, source-gate overlap, and amorphous silicon thickness. A critical relationship is established amongst these parameters and amorphous silicon doping levels.