The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 03, 1987

Filed:

Apr. 22, 1986
Applicant:
Inventor:

Christopher M Horwitz, Sydney, AU;

Assignee:

Unisearch Limited, New South Wales, AU;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K / ; H03K / ;
U.S. Cl.
CPC ...
307270 ; 307443 ; 307454 ; 307500 ; 307254 ;
Abstract

A new logic circuit construction in which gates are formed by appropriate interconnections of complementary current-mirror cells. With a signal applied, the resulting logic circuit draws a current drain which rises with power supply voltage, as does the speed of the circuit. With no signal the current drain of the circuit is small. Clocked circuits using this logic can use one clock line. With three states available in the clock line, a non-overlapping two-phase clock is automatically obtained with a simple oscillating signal. This logic circuit is also capable of providing a weighted input or output, enabling threshold logic ('multiple-valued logic') to be performed.


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