The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 20, 1987

Filed:

Aug. 26, 1985
Applicant:
Inventors:

Shigeo Kuboki, Nakaminato, JP;

Ikuro Masuda, Hitachi, JP;

Toshiaki Masuda, Kitaibaraki, JP;

Terumine Hayashi, Hitachi, JP;

Assignees:

Hitachi, Ltd., Tokyo, JP;

Hitachi Engineering Co., Ltd., Hitachi, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01R / ;
U.S. Cl.
CPC ...
371 25 ; 324 / ; 371 15 ;
Abstract

An integrated circuit device comprises combinational circuits and sequential circuits. Each of the sequential circuits is provided with a (common) input control signal terminal for controlling the entry of main input terminal signals into the sequential circuit, a test data input/output terminal, a read/write signal terminal for controlling the transfer of the test data, and a latch circuit. The integrated circuit device is partitioned into sequential circuit groups, and combinational circuit groups used as partitioning test units, the main input/output terminal groups of which are connected with the sequential circuit groups through wiring layers. Test data are written into and read out from the sequential circuit groups under control of read/write signal lines through bus lines dedicated to testing. Thus, a higher fault-coverage ratio can be easily obtained with a smaller number of steps and a small test circuit area.


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