The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 20, 1987
Filed:
Dec. 18, 1985
Applicant:
Inventors:
Mitsugu Naitoh, Kawasaki, JP;
Yoshiyuki Suehiro, Kawasaki, JP;
Assignee:
Fujitsu Limited, Kanagawa, JP;
Primary Examiner:
Int. Cl.
CPC ...
G01R / ;
U.S. Cl.
CPC ...
371 21 ; 324 / ; 371 27 ;
Abstract
In a semiconductor device comprising a memory cell array and a test pattern generating circuit, the test pattern generating circuit generates the test pattern and transmits the test pattern to the memory cell array when receiving the least significant bit signal of address signals supplied to the memory cell array and the control signal.
Naitoh, Mitsugu. (1987). Semiconductor device incorporating memory test pattern generating circuit (U.S. Patent No. 4701919). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/4701919
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile