The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 20, 1987

Filed:

Sep. 26, 1986
Applicant:
Inventors:

Hiroshi Ushiki, Yokohama, JP;

Tetsuaki Iwasaki, Tokyo, JP;

Assignees:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F / ; G06F / ;
U.S. Cl.
CPC ...
3403 / ; 3403 / ; 3072 / ; 364707 ;
Abstract

A plurality of key switches are provided between each pair of external terminals. A logic circuit generates time-division signals sequentially. The logic circuits stops the generation of these time-division signals during a blanking period with a predetermined time duration, thereby to stop the through-current during this period. The plurality of time-division signals are input to a plurality of buffer circuits. The outputs of the buffer circuits are supplied to the external output. Detection circuits detect only the operated key switches on the basis of the time-division signals and the signals from the external terminals exclusively used for key signal inputting. A plurality of switch members are provided between each of the external terminals and the reference potential. These switch members are conductive during the blanking period to improve the drive capability for external load.


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