The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 20, 1987

Filed:

Dec. 03, 1986
Applicant:
Inventors:

Kiyoshi Amazawa, Tokyo, JP;

Akira Mori, Tokyo, JP;

Assignee:

Clarion Co., Ltd., Tokyo, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03B / ; H04B / ;
U.S. Cl.
CPC ...
328165 ; 307520 ; 307542 ; 307549 ; 455312 ;
Abstract

A gate circuit is configured to output a received signal via a buffer amplifier, enter the output in a storage capacitor via a first switching circuit normally taking its off-position, compare the signal levels at both ends of the switching circuit and feed back the comparison result to an input terminal via a second switching circuit normally taking its on-position, and configured so that when noise components in the received signal are detected, a control signal is produced to change the first switching circuit to its on-position and the second switching circuit to its off-position.


Find Patent Forward Citations

Amazawa, Kiyoshi. (1987). Preceding value holding gate circuit for eliminating pulsive noises (U.S. Patent No. 4701715). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/4701715

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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