The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 06, 1987

Filed:

Jun. 06, 1985
Applicant:
Inventors:

Robert F Lembach, Rochester, MN (US);

Steven D Lewis, Rochester, MN (US);

Robert R Williams, Rochester, MN (US);

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
364490 ; 364488 ;
Abstract

A method of optimizing signal timing delays and power consumption through multi-path LSI circuits constructed from a plurality of circuit blocks, each circuit block having associated therewith a plurality of power levels which are selectable to control the timing delays through the circuit block, wherein the method steps include the formation of a power-performance derivative for each circuit block, identifying therefrom the relative contribution to signal delay of the circuit block in the entire multi-path configuration, and selecting the optimum power level for an overall multi-path minimum signal delay condition, through a process of iterative calculation of timing delays through individual circuit blocks and multi-path timing analysis.


Find Patent Forward Citations

Loading…