The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 06, 1987
Filed:
Mar. 19, 1985
Kiyoshi Itani, Gunma, JP;
Hisashi Tokizaki, Gunma, JP;
Tomohide Funagoshi, Gunma, JP;
Nobuo Ohtsuka, Gunma, JP;
Katsuhiro Ohkubo, Gunma, JP;
Hikaru Katsuki, Gunma, JP;
Sanyo Electric Co., Ltd., , JP;
Abstract
An inverter apparatus comprises a bridge circuit composed of a combination of a plurality of switching transistors and a microprocessor controlling turning on and turning off of these switching transistors. Patterns of combinations of ON and OFF states of respective switching transistors obtained based on the theory of PWM (pulse width modulation) are stored in a first ROM of microprocessor. Transition of the pattern for each range of 0.degree.-30.degree. in electrical angle is stored in a second ROM in the sequence of periods subdivided from the range. Data of the time during which the pattern to be held for each period is stored in a third ROM. The microprocessor sets the holding time data in a timer, and also outputs the ON/OFF pattern, thereby turning on or turning off of each switching transistor is controlled in accordance with the count of this timer and the ON/OFF pattern. By repeating this cycle, a switching signal which continues during one cycle of AC (range of 0.degree.-360.degree. in electrical angle) is given to each switching transistor. Accordingly, an AC output by the PWM system is obtainable from the bridge circuit.