The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 06, 1987

Filed:

Feb. 19, 1986
Applicant:
Inventor:

Moriya Nakahara, Kawasaki, JP;

Assignee:

Kabushiki Kaisha Toshiba, Kawasaki, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L / ; H01L / ;
U.S. Cl.
CPC ...
437 20 ; 148D / ; 148D / ; 357 91 ; 437233 ;
Abstract

A method of manufacturing a semiconductor device has the steps of forming an insulating film on a semiconductor substrate, forming a polycrystalline silicon layer on the insulating film, converting either all of the polycrystalline silicon layer or a portion of predetermined thickness of the polycrystalline silicon layer into an amorphous silicon layer, patterning the polycrystalline silicon layer, either all of which or a portion of predetermined thickness of which has been converted into an amorphous silicon layer, and ion-implanting an impurity in the semiconductor substrate using the patterned layer as a mask.


Find Patent Forward Citations

Nakahara, Moriya. (1987). Method of manufacturing a semiconductor device using amorphous silicon (U.S. Patent No. 4697333). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/4697333

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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