The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 29, 1987

Filed:

Jun. 03, 1985
Applicant:
Inventor:

Yoshihiro Nozue, Tochigi, JP;

Assignee:

Fujitsu Limited, Kawasaki, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G08C / ; G06F / ;
U.S. Cl.
CPC ...
371-5 ; 371 56 ; 375 10 ; 375 17 ; 375 26 ;
Abstract

A multi-value signal monitor circuit in a data transmitting and receiving system which transmits data after conversion into a multi-value signal and obtains the original data through analog-to-digital conversion of the received multi-value signal. The data is converted more accurately than the number of bits of data transmitted, during the analog-to-digital conversion on the receiving side. The position of the received signal relative to the quantization level is determined by utilizing the extra bits. When the extra bits indicate the multi-value signal is outside the specified range of the quantization level a pseudo error is detected. The pseudo errors are counted to produce a pseudo error rate which is used as an error rate for transmission path switching purposes.


Find Patent Forward Citations

Nozue, Yoshihiro. (1987). Error monitor circuit (U.S. Patent No. 4697265). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/4697265

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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