The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 22, 1987
Filed:
Jun. 04, 1985
Stefan Barbu, Caen, FR;
Leonardus Valkestijn, Ba Eindhoven, NL;
Franciscus A van de Kerkhof, Ba Eindhoven, NL;
U.S. Philips Corporation, New York, NY (US);
Abstract
A slave-type interface circuit operating with a series bus in a configuration in which writing takes place after recognition of an address. A cycle transmitted by the bus contains an address sequence and a data sequence. The circuit controls a plurality of user circuits (COM) on the basis of data stored in a memory (M) and of a decoder (CDEC). A register (REG) and a bus logic (BUSL) receive at their inputs (L.sub.1, L.sub.2) information (SDA) and clock (SCL) signals. The bus logic (BUSL) receives from an identification circuit (AIC) a signal (DVA) indicating whether or not the address transmitted by the bus corresponds to an address A.sub.0, A.sub.1, A.sub.2 displayed at the inputs S.sub.0, S.sub.1 and S.sub.2. It controls the circuit on the basis of the register (REG) initialization signal (RST1), a signal LDS) for the authorization of the loading of data into the memory (M) and an acceptance signal (ACK) transmitted in the direction of the bus.