The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 15, 1987

Filed:

Apr. 12, 1985
Applicant:
Inventors:

Michiro Shibui, Tokyo, JP;

Yoshihiro Hanamoto, Hyogo, JP;

Yoshio Ishigaki, Tokyo, JP;

Hiroshi Sahara, Kanagawa, JP;

Satoru Maeda, Kanagawa, JP;

Yasushi Noguchi, Kanagawa, JP;

Assignees:
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
364518 ; 340726 ; 364521 ; 364900 ;
Abstract

An apparatus for scrolling the display of images obtained from a plurality of data units, each having pattern signals representing a plurality of horizontal lines and a corresponding color signal includes a video display having a plurality of horizontal display lines, a first memory for storing the pattern signals formed with first addresses corresponding to the plurality of horizontal display lines and a first buffer area for temporarily storing received pattern signals, a second memory for storing the color signal formed with second addresses corresponding to the numbers of the data units and a second buffer area for temporarily storing a received color signal, the pattern signals and a corresponding color signal being stored in the first and second buffer areas, respectively. A read out system operates so that the first memory, including the first buffer area, is read out by accessing the first addresses in a pre-determined order and so that the second memory, including the second buffer area, is read out by accessing the second addresses in a pre-determined order. Also provided is a circuit for transferring the pattern signal of a horizontal line stored in the first buffer area to a corresponding address of the first memory and for transferring a corresponding color signal stored in the second buffer area to a corresponding address of the second memory, and a circuit for supplying the pattern signals and the corresponding color signal to the display tube.


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