The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 08, 1987
Filed:
Sep. 28, 1984
Alan D Poeppelman, Dayton, OH (US);
NCR Corporation, Dayton, OH (US);
Abstract
A memory array architecture configured in one form with multiple subarrays addressable by row lines, bank select lines and column select lines, arranged so that no two data word bit positions have a common row line also share common bank select lines. The addition of isolation between the row lines and the row bus combined with the shifting or jogging of the bank select lines in adjacent subarrays ensures that a short circuit or open circuit in a row line no longer effects multiple bits in a common word. The ability to control the effects of manufacturing defects so that they commonly effect no more than a single bit position within a word makes feasible the use of error correction coding techniques within for example integrated circuit ROM type memories.