The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 25, 1987
Filed:
Jan. 21, 1986
Franciscus A Schoofs, Eindhoven, NL;
Martinus P Bierhoff, Eindhoven, NL;
Job F Van Mil, Eindhoven, NL;
Albert H Slomp, Eindhoven, NL;
U.S. Philips Corporation, New York, NY (US);
Abstract
For detecting whether an input signal is above or below a reference level in such a way that brief signal interruptions and negative spurious pulses are not interpreted as decreases below the reference level, the detector includes an input comparator, a first delay circuit, a second delay circuit and an output circuit. The first delay circuit comprises a first integrator comprising a first transistor and a first capacitor, a first current source and a second comparator. The second delay circuit comprises a second integrator with a second transistor and a second capacitor, a second current source and a third comparator. The first delay circuit and the second delay circuit have equal delay times. In order to ensure that during detection of a decrease below the reference level a positive spurious pulse is not interpreted as an increase above the reference level a third Transistor connects a third current source in parallel with the first current source of the first delay circuit when the input signal lies below the reference level, so that the delay time of the first delay circuit becomes smaller than that of the second delay circuit.