The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 11, 1987

Filed:

Jul. 21, 1986
Applicant:
Inventors:

Richard Noto, Maple Shade, NJ (US);

David C Smith, Williamstown, NJ (US);

Assignee:

RCA Corporation, Princeton, NJ (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
364491 ; 364488 ; 357 45 ;
Abstract

An improved automatic placement process for placing logic cells in a universal array. Unused basic units are assigned to rows to reduce the congestion of the wiring in high congestion regions of a universal array. These assigned unused basic units are allocated among rows in a pyramidal manner. Those unused basic units allocated to a given row are distributed along that row in a manner to reduce wiring congestion. During a pair exchange portion of the placement process, quality criteria used for deciding whether to exchange two logic cells on different rows include skipped rows in a node, y-span of a node, minimizing the number of logic cells in excess of two in a node on a row, making a longest row shorter and making longer a shortest row or one which is within a tolerance of being a shortest row.


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