Pulse train presence detector

Abstract

A pulse train presence detector for a system having a number of interruptible devices, consists of a pulse generator, interface device which receives a periodic trigger signal and outputs a pulse train signal in response thereto, the pulse train signal is communicated to an NPN transistor and operates the transistor to alternating 'on' and 'off' states. A first current path is established during the transistor 'off' state through which a first current flows and charges a first capacitor. A second current path branches off from the first current path, wherein a second current flows when the transistor is 'on'. A forward-biased diode in the first current path and an adjacent reverse-biased diode in the second current path block cross-flowing of currents between the respective paths. A second capacitor in the second current path is charged when the transistor is 'on'. The current in the second path flows as a result of the charged first capacitor in the first current path, this second current serving to energize relay and to charge the second capacitor. When the transistor is turned 'off', the second capacitor discharges to energize the relay. The charging and discharging times in this alternating manner is selected to coincide with the pulse train segments. A too long high or low segment prevents the charging of the second capacitor or discharging of the first capacitor.